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| communication semiconductors cmx868 data bulletin low power v.22bis modem 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. advance information features applications v.22bis 2400/2400bps qam v.22, bell 212a 1200/1200 or 600/600bps dpsk v.23 1200/75, 1200/1200, 75, 1200bps fsk bell 202 1200/150, 1200/1200, 150, 1200bps fsk v.21 or bell 103 300/300bps fsk dtmf/tones transmit and receive extremely low power: 3.5ma/3v, 6.5ma/5v typical ?powersave? standby mode cable tv set top box (stb) telephone telemetry systems remote utility meter reading security systems industrial control systems electronic cash terminals pay-phones modem links with caller id c-bus serial interface line cmx868 line interface host c tx usart & scrambler. qam / dpsk / fsk modulator. tone / dtmf generator. rx descrambler & usart, qam / dpsk / fsk receiver. tone / dtmf detector. ring detector. relay driver. the cmx868 is a multi-standard modem for use in telephone based information and telemetry systems. control of the device is via a simple high speed serial bus, compatible with most types of c serial interface. the data transmitted and received by the modem is also transferred over the same serial bus. on-chip programmable tx and rx usarts meeting the requirements of v.14 are provided for use with asynchronous data and allow unformatted synchronous data to be received or transmitted as 8-bit words. it can transmit and detect standard dtmf and modem calling and answer signals or user-specific programmed single or dual tone signals. a general purpose call progress signal detector is also included. flexible line driver and receive hybrid circuits are integrated on chip, requiring only passive external components to build a 2 or 4-wire line interface. the device also features a hook switch relay drive output and a ring detector circuit which continues to function when the device is in the powersave mode, providing an interrupt which can be used to wake up the host controller when line voltage reversal or ringing is detected. the cmx868 operates from a single 2.7 to 5.5v supply over a temperature range of -40c to +85c and is available in 24-pin tssop, soic and dip packages.
low power v.22bis modem 2 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. contents section page 1 block diagram ............................................................................................................... 3 2 signal list .................................................................................................................... .. 4 3 external components ................................................................................................... 5 3.1 ring detector interface........................................................................................................ .6 3.2 line interface................................................................................................................. .......7 3.2.1 2-wire line interface .......................................................................................................... .... 7 3.2.2 4-wire line interface .......................................................................................................... .... 8 4 general description ...................................................................................................... 9 4.1 tx usart ....................................................................................................................... ...10 4.2 fsk and qam/dpsk modulators .......................................................................................11 4.3 tx filter and equalizer........................................................................................................ 12 4.4 dtmf/tone generator .......................................................................................................12 4.5 tx level control and output buffer ....................................................................................12 4.6 rx dtmf/tones detectors .................................................................................................12 4.7 rx modem filtering and demodulation ..............................................................................13 4.8 rx modem pattern detectors and descrambler .................................................................14 4.9 rx data register and usart ............................................................................................15 4.10 c-bus interface ................................................................................................................ .16 4.10.1 general reset command (no data) c-bus address $01 .................................................. 17 4.10.2 general control register: 16-bit write-only c-bus address $e0........................................ 18 4.10.3 transmit mode register: 16-bit write-only c-bus address $e1 ......................................... 19 4.10.4 receive mode register ........................................................................................................ 23 4.10.5 tx data register ............................................................................................................... .... 25 4.10.6 rx data register............................................................................................................... .... 25 4.10.7 status register: 16-bit read-only c-bus address $e6 ...................................................... 26 4.10.8 programming register.......................................................................................................... 2 9 5 application notes........................................................................................................ 32 5.1 v.22bis calling modem application ....................................................................................32 5.2 v.22bis answering modem application ..............................................................................33 6 performance specification ......................................................................................... 34 6.1 electrical performance .......................................................................................................34 6.1.1 absolute maximum ratings .................................................................................................. 34 6.1.2 operating limits............................................................................................................... ..... 34 6.1.3 operating characteristics ..................................................................................................... 3 5 6.2 packaging...................................................................................................................... .....42 mx-com, inc. reserves the right to change specifications at any time and without notice. low power v.22bis modem 3 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 1 block diagram c-bus serial interface + tx / rx data registers & usart irq cs rdrv xtal / clock xtal v dd v ss v bias local analog loopback tx output buffer tx level control rx input amplifier rx gain control txa txa rxafb rxa + - rxa reply data rt rd command data serial clock scrambler enable descrambler enable qam/dpsk modulator fsk demodulator ring detector qam/dpsk demodulator fsk modulator dtmf/tone generator modem energy detector dtmf/tone/ call prog/ answer tone detector receive modem filter & equalizer transmit filter & equalizer xtal osc and clock dividers figure 1: block diagram low power v.22bis modem 4 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 2 signal list d2/e2/p4 signal description pin no. name type 1 xtal output the output of the on-chip xtal oscillator inverter. 2 xtal/clock input the input to the oscillator inverter from the xtal circuit or external clock source. 3 rdrv output relay drive output, low resistance pull down to v ss when active and medium resistance pull up to v dd when inactive. 4, 8, 12, 17, 21 v ss power the negative supply rail (ground). 5 rd input schmitt trigger input to the ring signal detector. connect to v ss if ring detector not used. 6 rt bi-directional open drain output and schmitt trigger input forming part of the ring signal detector. connect to v dd if ring detector not used. 7, 16, 24 v dd power the positive supply rail. levels and thresholds within the device are proportional to this voltage. 9 rxafb output the output of the rx input amplifier. 10 rx a input the inverting input to the rx input amplifier 11 rxa input the non-inverting input to the rx input amplifier 13 v bias output internally generated bias voltage of approximately v dd /2, except when the device is in ?powersave? mode when v bias will discharge to v ss . should be de-coupled to v ss by a capacitor mounted close to the device pins. 14 tx a output the inverted output of the tx output buffer. 15 txa output the non-inverted output of the tx output buffer. 18 cs input the c-bus chip select input from the c. 19 command data input the c-bus serial data input from the c. 20 serial clock input the c-bus serial clock input from the c. 22 reply data tri-state a 3-state c-bus serial data output to the c. this output is high impedance when not sending data to the c. 23 irq output a ?wire-orable? output for connection to a c interrupt request input. this output is pulled down to v ss when active and is high impedance when inactive. an external pull-up resistor is required i.e. r1 of figure 2. table 1: signal list low power v.22bis modem 5 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 3 external components 1 c1 c2 c3 x1 xtal xtal/clock c-bus to/from c ring detector see section 3.1 tx line interface see section 3.2 rx line interface see section 3.2 serial clock command data reply data cs irq rdrv rt txa rxa rxa rxafb txa rd v dd v dd v bias 2 5 6 8 9 cmx868 10 11 7 12 13 14 15 16 17 18 19 20 21 22 23 24 r1 v dd v ss v ss v ss 3 4 v dd v ss c4 c5 + v dd figure 2: recommended external components for typical applciation r1 100k c5 10uf c1, c2 22pf x1 11.0592mhz or 12.288mhz c3, c4 100nf resistors 5%, capacitors 20% unless otherwise stated. table 2: recommended external components for typical application note: 1. this device is capable of detecting and decoding small amplitude signals. to achieve this v dd and v bias should be de-coupled and the receive path protected from extraneous in-band signals. it is recommended that the printed circuit board be laid out with a v ss ground plane in the cmx868 area to provide a low impedance connection between the v ss pins and the v dd and v bias decoupling capacitors. the v ss connections to the xtal oscillator capacitors c1 and c2 should also be low impedance and preferably be part of the v ss ground plane to ensure reliable start up of the oscillator. 2. for best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of v dd , peak to peak. tuning fork crystals generally cannot meet this requirement. to obtain crystal oscillator design assistance, please consult your crystal manufacturer. low power v.22bis modem 6 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 3.1 ring detector interface figure 3 shows how the cmx868 may be used to detect the large amplitude ringing signal voltage present on the 2-wire line at the start of an incoming telephone call. the ring signal is usually applied at the subscriber's exchange as an ac voltage inserted in series with one of the telephone wires and will pass through either c20 and r20 or c21 and r21 to appear at the top end of r22 (point x in figure 3) in a rectified and attenuated form. the signal at point x is further attenuated by the potential divider formed by r22 and r23 before being applied to the cmx868 rd input. if the amplitude of the signal appearing at rd is greater than the input threshold (vt hi ) of schmitt trigger 'a' then the n transistor connected to rt will be turned on, pulling the voltage at rt to v ss by discharging the external capacitor c22. the output of the schmitt trigger 'b' will then go high, setting bit 14 (ring detect) of the status register. the minimum amplitude ringing signal that is certain to be detected is: rms hi v 707 . 0 23 r 23 r 22 r 20 r vt 7 . 0 where vt hi is the high-going threshold voltage of the schmitt trigger a (see section 6.1). with r20-22 all 470k as figure 3, then setting r23 to 68k will guarantee detection of ringing signals of 40v rms and above for v dd over the range 3 to 5v. 2-wire telephone line rd cmx868 to status register rt v dd d1 - 4 c20 c22 r20 r21 r22 r23 r24 c21 rt status register bit 14 (ring detect) bridge rectifier output (x) ring signal vt hi v ss v ss vt hi a b x figure 3: ring signal interface circuit r20, 21, 22 470k c20, 21 0.1 f r23 see text c22 0.33 f r24 470k d1-4 1n4004 resistors 5%, capacitors 20% table 3: ring signal detector interface circuit external components low power v.22bis modem 7 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. if the time constant of r24 and c22 is large enough then the voltage on rt will remain below the threshold of the 'b' schmitt trigger for the duration of a ring cycle. the time for the voltage on rt to charge from v ss towards v dd can be derived from the formula 22 c 24 r t dd rt e 1 v v as the schmitt trigger high-going input threshold voltage (vt hi ) has a minimum value of 0.56 x v dd , then the schmitt trigger b output will remain high for a time of at least 0.821 x r24 x c22 following a pulse at rd. the values of r24 and c22 given in figure 3 (470k and 0.33 f) give a minimum rt charge time of 100ms, which is adequate for ring frequencies of 10hz or above. note: the circuit will also respond to a telephone line voltage reversal. if necessary the c can distinguish between a ring signal and a line voltage reversal by measuring the time that bit 14 of the status register (ring detect) is high. if the ring detect function is not used then pin rd should be connected to v ss and rt to v dd . 3.2 line interface a line interface circuit is needed to provide dc isolation and to terminate the line. 3.2.1 2-wire line interface figure 4 shows an interface for use with a 600 2-wire line. the complex line termination is provided by r13 and c10, high frequency noise is attenuated by c10 and c11, while r11 and r12 set the receive signal level into the modem. for clarity, the 2-wire line protection circuitry has not been shown. +ve r13 2-wire line 1:1 rdrv - + to ring detect circuit see section 3.1 optional buffer if needed to drive low resistance relay cmx868 txa txa r11 c11 r12 c3 c10 rxa rxa v bias rxafb figure 4: 2-wireline interface circuit r11 see text c3 see figure 2 r12 100k c10 33nf r13 600 c11 100pf resistors 5%, capacitors 20% table 4: 2-wireline interface circuit external components the transmit line signal level is determined by the voltage swing between the txa and tx a pins, less 6db due to the line termination resistor r13, and less the loss in the line coupling transformer. low power v.22bis modem 8 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. allowing for 1db loss in the transformer, then with the tx mode register set for a tx level control gain of 0db the nominal transmit line levels will be: v dd = 3.0v v dd = 5.0v qam, dpsk and fsk tx modes (no guard tone) -10dbm -5.5dbm single tone transmit mode -10dbm -5.5dbm dtmf transmit mode -6 and -8 dbm -1.5 and -3.5 dbm for a line impedance of 600 , 0dbm = 775mv rms . see also section 6.1.3. in the receive direction, the signal detection thresholds within the cmx868 are proportional to v dd and are affected by the rx gain control gain setting in the rx mode register. the signal level into the cmx868 is affected by the line coupling transformer loss and the values of r11 and r12 of figure 4. assuming 1db transformer loss, the rx gain control programmed to 0db and r12 = 100k , then for correct operation (see section 6.1.3) the value of r11 should be equal to 500 / v dd k i.e. 160k at 3.0v, falling to 100k at 5.0v 3.2.2 4-wire line interface figure 5 shows an interface for use with a 600 4-wire line. the line terminations are provided by r10 and r13, high frequency noise is attenuated by c11 while r11 and r12 set the receive signal level into the modem. transmit and receive line level settings and the value of r11 are as for the 2-wire circuit. c12 r10 rx tx 4-wire line 1:1 r13 - + cmx868 txa txa r11 c11 r12 c3 rxa rxa v bias rxafb figure 5: 4-wireline interface circuit r10, 13 600 1 c3 see figure 2 r11 see text c11 100pf r12 100k c12 33nf resistors 5%, capacitors 20% table 5: 4-wireline interface circuit external components low power v.22bis modem 9 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4 general description the cmx868 transmit and receive operating modes are independently programmable. the transmit mode can be set to any one of the following: v.22bis modem. 2400bps qam (quadrature amplitude modulation). v.22 and bell 212a modem. 1200 or 600bps dpsk (differential phase shift keying). v.21 modem. 300bps fsk (frequency shift keying). bell 103 modem. 300bps fsk. v.23 modem. 1200 or 75bps fsk. bell 202 modem. 1200 or 150bps fsk. dtmf transmit. single tone transmit (from a range of modem calling, answer and other tone frequencies) user programmed tone or tone pair transmit (programmable frequencies and levels) disabled. the receive mode can be set to any one of the following: v.22bis modem. 2400bps qam. v.22 and bell 212a modem. 1200 or 600bps dpsk. v.21 modem. 300bps fsk. bell 103 modem. 300bps fsk. v.23 modem. 1200 or 75bps fsk. bell 202 modem. 1200 or 150bps fsk. dtmf detect. 2100hz and 2225hz answer tone detect. call progress signal detect. user programmed tone or tone pair detect. disabled. the cmx868 may also be set into a powersave mode that disables all circuitry except for the c-bus interface and the ring detector. low power v.22bis modem 10 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.1 tx usart a flexible tx usart is provided for all modem modes, meeting the requirements of v.14 for qam and dpsk modems. it can be programmed to transmit continuous patterns, start-stop characters or synchronous data. in both synchronous data and start-stop modes the data to be transmitted is written by the c into the 8-bit c-bus tx data register from which it is transferred to the tx data buffer. if synchronous data mode has been selected the 8 data bits in the tx data buffer are transmitted serially, b0 being sent first. in start-stop mode a single start bit is transmitted, followed by 5, 6, 7 or 8 data bits from the tx data buffer - b0 first - followed by an optional parity bit then - normally - one or two stop bits. the start, parity and stop bits are generated by the usart as determined by the tx mode register settings and are not taken from the tx data register. tx data register c-bus interface tx usart modem bit rate clock continuous patterns to fsk or qam/dpsk modulator enable tx data from c start/stop bits tx data buffer parity bit generator usart control 7 0 scrambler figure 6: tx usart every time the contents of the c-bus tx data register are transferred to the tx data buffer the tx data ready flag bit of the status register is set to 1 to indicate that a new value should be loaded into the c-bus tx data register. this flag bit is cleared to 0 when a new value is loaded into the tx data register. start tx line signal: tx data ready flag bit: par'y stop b0 b1 b7 figure 7: tx usart function (start-stop mode, 8 data bits + parity) if a new value is not loaded into the tx data register in time for the next tx data register to tx data buffer transfer then the status register tx data underflow bit will be set to 1. in this event the contents of the tx data buffer will be re-transmitted if synchronous data mode has been selected, or if the tx modem is in start-stop mode then a continuous stop signal (1) will be transmitted until a new value is loaded into the tx data register. in all modes the transmitted bit and baud rates are the nominal rates for the selected modem type, with an accuracy determined by the xtal frequency accuracy, however for qam and dpsk modes v.14 requires that start-stop characters can be transmitted at up to 1% over-speed (basic signaling rate range) or 2.3% over-speed (extended signaling rate range) by deleting a stop bit from no more than one out of every 8 (basic range) or 4 (extended range) consecutive transmitted characters. to accommodate the v.14 requirement the tx data register has been given two c-bus addresses, $e3 and $e4. data should normally be written to $e3. in qam or dpsk start-stop modes if data is written to $e4 then the programmed number of stop bits will be reduced by one for that character. in this way the c can delete transmitted stop bits as needed. low power v.22bis modem 11 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. in fsk start-stop modes, data written to $e4 will be transmitted with a 12.5% reduction in the length of the stop bit at the end of that character. in all synchronous data modes data written to $e4 will be treated as though it had been written to $e3. the underspeed transmission requirement of v.14 is automatically met by the cmx868 as in start-stop mode it automatically inserts extra stop bit(s) if it has to wait for new data to be loaded into the c-bus tx data register. the optional v.22/v.22bis compatible data scrambler can be programmed to invert the next input bit in the event of 64 consecutive ones appearing at its input. it uses the generating polynomial: 17 14 x x 1 4.2 fsk and qam/dpsk modulators serial data from the usart is fed via the optional scrambler to the fsk modulator if v.21, v.23, bell 103 or bell 202 mode has been selected or to the qam/dpsk modulator for v.22, v.22bis and bell 212a modes. the fsk modulator generates one of two frequencies according to the transmit mode and the value of current transmit data bit. the qam/dpsk modulator generates a carrier of 1200hz (low band, calling modem) or 2400hz (high band, answering modem) which is modulated at 600 symbols/sec as described below: 600bps v.22 signals are transmitted as a +90 carrier phase change for a ?0? bit, +270 for ?1?. for v.22 and bell 212a 1200bps dpsk the transmit data stream is divided into groups of two consecutive bits (dibits) which are encoded as a carrier phase change: dibit (left-hand bit is the first of the pair) phase change 00 +90 01 0 11 +270 10 +180 for v.22bis 2400bps qam the transmit data stream is divided into groups of 4 consecutive data bits. the first two bits of each group are encoded as a phase quadrant change and the last two bits define one of four elements within a quadrant: first two bits of group (left-hand bit is the first of the pair) phase quadrant change 00 +90 (e.g. quadrant 1 to 2) 01 0 (no change of quadrant) 11 +270 (e.g. quadrant 1 to 4) 10 +180 (e.g. quadrant 1 to 3) 00 11 10 10 10 10 01 q i phase quadrant 1 phase quadrant 2 phase quadrant 3 phase quadrant 4 01 01 01 11 11 11 00 00 00 figure 8: v.22 bis signal constellation low power v.22bis modem 12 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.3 tx filter and equalizer the fsk or qam/dpsk modulator output signal is fed through the transmit filter and equalizer block which limits the out-of-band signal energy to acceptable limits. in 600, 1200 and 2400bps fsk, dpsk and qam modes this block includes a fixed compromise line equalizer which is automatically set for the particular modulation type and frequency band being employed. this fixed compromise line equalizer may be enabled or disabled by bit 10 of the general control register. the amount of tx equalization provided compensates for one quarter of the relative amplitude and delay distortion of ets test line 1 over the frequency band used. 4.4 dtmf/tone generator in dtmf/tones mode this block generates dtmf signals or single or dual frequency tones. in qam/dpsk modem modes, it is used to generate the optional 550 or 1800hz guard tone. 4.5 tx level control and output buffer the outputs (if present) of the transmit filter and dtmf/tone generator are summed then passed through the programmable tx level control and tx output buffer to the pins txa and tx a . the tx output buffer has symmetrical outputs to provide sufficient line voltage swing at low values of v dd and to reduce harmonic distortion of the signal. 4.6 rx dtmf/tones detectors in rx tones detect mode the received signal, after passing through the rx gain control block, is fed to the dtmf / tones / call progress / answer tone detector. the user may select any of four separate detectors: the dtmf detector detects standard dtmf signals. a valid dtmf signal will set bit 5 of the status register to 1 for as long as the signal is detected. the programmable tone pair detector includes two separate tone detectors (see figure 20). the first detector will set bit 6 of the status register for as long as a valid signal is detected, the second detector sets bit 7, and bit 10 of the status register will be set when both tones are detected. the call progress detector measures the amplitude of the signal at the output of a 275 - 665hz bandpass filter and sets bit 10 of the status register to 1 when the signal level exceeds the measurement threshold. -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db figure 9: response of call progress filter the answer tone detector measures both amplitude and frequency of the received signal and sets bit 6 or bit 7 of the status register when a valid 2225hz or 2100hz signal is received. low power v.22bis modem 13 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.7 rx modem filtering and demodulation when the receive part of the cmx868 is operating as a modem, the received signal is fed to a bandpass filter to attenuate unwanted signals and to provide fixed compromise line equalization for 600, 1200 and 2400bps fsk, dpsk and qam modes. the characteristics of the bandpass filter and equalizer are determined by the chosen receive modem type and frequency band. the line equalizer may be enabled or disabled by bit 10 of the general control register and compensates for one quarter of the relative amplitude and delay distortion of ets test line 1. the responses of these filters, including the line equalizer and the effect of external components used in figure 4 and figure 5, are shown in figure 10, figure 11, figure 12, and figure 13: -60 -50 -40 -30 -20 -10 0 10 00.511.522.533.54 khz db figure 10: qam/dpsk rx filters -60 -50 -40 -30 -20 -10 0 10 00.511.522.533.54 khz db figure 11: v.21 rx filters -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db figure 12: bell 103 rx filters -60 -50 -40 -30 -20 -10 0 10 00.511.522.533.54 khz db figure 13: bell 202 / v.23 rx filters the signal level at the output of the receive modem filter and equalizer is measured in the modem energy detector block, compared to a threshold value, and the result controls bit 10 of the status register. the output of the receive modem filter and equalizer is also fed to the fsk or qam/dpsk demodulator depending on the selected modem type. low power v.22bis modem 14 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. the fsk demodulator recognizes individual frequencies as representing received ?1? or ?0? data bits: the qam/dpsk demodulator decodes qam or dpsk modulation of a 1200hz or 2400hz carrier and is used for v.22, v.22bis and bell 212a modes. it includes an adaptive receive signal equalizer (auto-equalizer) that will automatically compensate for a wide range of line conditions in both qam and dpsk modes. the auto- equalizer can provide a useful improvement in performance in 600 or 1200bps dpsk modes as well as 2400bps qam, so although it must be disabled at the start of a handshake sequence, it can be enabled as soon as scrambled 1200bps 1s have been detected. both fsk and qam/dpsk demodulators produce a serial data bit stream that is fed to the rx pattern detector, descrambler and usart block. see figure 14. in qam/dpsk modes the demodulator input is also monitored for the v.22bis handshake signal ?s1? signal. the qam/dpsk demodulator also estimates the received bit error rate by comparing the actual received signal against an ideal waveform. this estimate is placed in bits 2-0 of the status register. see figure 19. 4.8 rx modem pattern detectors and descrambler reference figure 14. the 1010.. pattern detector operates only in fsk modes and will set bit 9 of the status register when 32 bits of alternating 1?s and 0?s have been received. the ?continuous unscrambled 1?s? detector operates in all modem modes and sets bits 8 and 7 of the status register to ?01? when 32 consecutive 1?s have been received. the descrambler operates only in dpsk/qam modes and is enabled by setting bit 7 of the rx mode register. the ?continuous scrambled 1?s? detector operates only in dpsk/qam modes when the descrambler is enabled and sets bits 8 and 7 of the status register to ?11? when 32 consecutive 1?s appear at the output of the descrambler. to avoid possible ambiguity, the ?scrambled 1?s? detector is disabled when continuous unscrambled 1?s are detected. the ?continuous 0?s? detector sets bits 8 and 7 of the status register to ?10? when nx consecutive 0?s have been received, nx being 32 except when dpsk/qam start-stop mode has been selected, in which case nx = 2n + 4 where n is the number of bits per character including the start, stop and any parity bits. all of these pattern detectors will hold the ?detect? output for 12 bit times after the end of the detected pattern unless the received bit rate or operating mode is changed, in which case the detectors are reset within 2ms. low power v.22bis modem 15 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.9 rx data register and usart a flexible rx usart is provided for all modem modes, meeting the requirements of v.14 for qam and dpsk modems. it can be programmed to treat the received data bit stream as synchronous data or as start-stop characters. in synchronous mode the received data bits are all fed into the rx data buffer which is copied into the c-bus rx data register after every 8 bits. in start-stop mode the usart control logic looks for the start of each character, then feeds only the required number of data bits (not parity) into the rx data buffer. the parity bit (if used) and the presence of a stop bit are then checked and the data bits in the rx data buffer copied to the c-bus rx data register. bit rate clock start/stop bits rx data buffer parity bit checker usart control rx data register c-bus interface rx usart rx data to c 7 0 from fsk or qam/dpsk demodulator b9 status register: b7 b8 descrambler (qam/dpsk only) enable continuous scrambled 1s detector continuous 0s detector continuous unscrambled 1s detector 1010 detector (fsk only) figure 14: rx modem data paths whenever a new character is copied into the c-bus rx data register, the rx data ready flag bit of the status register is set to ?1? to prompt the c to read the new data; and in start-stop mode, the even rx parity flag bit of the status register is updated. in start-stop mode, if the stop bit is missing (received as a ?0? instead of a ?1?) the received character will still be placed into the rx data register and the rx data ready flag bit set, but, unless allowed by the v.14 over- speed option described below, the status register rx framing error bit will also be set to ?1? and the usart will re-synchronize onto the next ?1? ? ?0? (stop ? start) transition. the rx framing error bit will remain set until the next character has been received. start rx signal: rx data ready flag bit: par'y stop b0 b1 b7 figure 15: rx usart function (start-stop mode, 8 data bits + parity) if the c has not read the previous data from the rx data register by the time that new data is copied to it from the rx data buffer then the rx data overflow flag bit of the status register will be set to 1. the rx data ready flag and rx data overflow bits are cleared to 0 when the rx data register is read by the c. for qam and dpsk start-stop modes, v.14 requires that the receive usart be able to cope with missing stop bits; up to 1 missing stop bit in every 8 consecutive received characters being allowed for the +1% over- speed (basic signaling rate) v.14 mode and 1 in 4 for the +2.3% over-speed (extended signaling rate) mode. to accommodate the requirements of v.14, the cmx868 rx mode register can be set for 0, +1% or +2.3% over-speed operation in qam or dpsk start-stop modes. missing stop bits beyond those allowed by the selected over-speed option will set the rx framing error flag bit of the status register. low power v.22bis modem 16 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. in order that received break signals can be handled correctly in v.14 rx over-speed mode, a received character which has all bits ?0?, including the stop and any parity bits, will always cause the rx framing error bit to be set and the usart to re-synchronize onto the next ?1? ? ?0? transition. additionally the received continuous 0s detector will respond when more than 2m + 3 consecutive ?0?s are received, where ?m? is the selected total number of bits per character including stop and any parity bits. 4.10 c-bus interface this block provides for the transfer of data and control or status information between the cmx868?s internal registers and the c over the c-bus serial bus. each transaction consists of a single register address byte sent from the c which may be followed by a one or more data byte(s) sent from the c to be written into one of the cmx868?s write only registers, or a one or more byte(s) of data read out from one of the cmx868?s read only registers, as illustrated in figure 16. data sent from the c on the command data line is clocked into the cmx868 on the rising edge of the serial clock input. reply data sent from the cmx868 to the c is valid when the serial clock is high. the cs line must be held low during a data transfer and kept high between transfers. the c-bus interface is compatible with most common c serial interfaces and may also be easily implemented with general-purpose c i/o pins controlled by a simple software routine. figure 24 gives detailed c-bus timing requirements. the following c-bus addresses and registers are used by the cmx868: general reset command (address only, no data). address $01 general control register, 16-bit write-only. address $e0 transmit mode register, 16-bit write-only. address $e1 receive mode register, 16-bit write-only. address $e2 transmit data register, 8-bit write-only. addresses $e3 and $e4 receive data register, 8-bit read-only. address $e5 status register, 16-bit read-only. address $e6 programming register, 16-bit write-only. address $e8 note: the c-bus addresses $e9, $ea and $eb are allocated for production testing and should not be accessed in normal operation. low power v.22bis modem 17 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.10.1 general reset command (no data) c-bus address $01 this command resets the device and clears all bits of the general control, transmit mode and receive mode registers and bits 15 and 13-0 of the status register. whenever power is applied to the cmx868 a general reset command should be sent to the device, after which the general control register should be set as required. cs a) single byte from c serial clock command data address (01 hex = reset) = level not important note: the serial clock line may be high or low at the start and end of each transaction. see figure 24. hi-z reply data 7 654 321 0 b) one address and one data byte from c cs serial clock command data address hi-z data to cmx868 reply data 7 654 321 0 7 654 321 0 c) one address and 2 data bytes from c cs serial clock command data address hi-z first (msb) data byte to cmx868 second (lsb) data byte to cmx868 reply data 7 654 321 0 7 654 321 0 7 654 321 0 d) one address byte from c and one reply byte from cmx868 cs serial clock hi-z address data from cmx868 command data reply data 7 654 321 0 7 654 321 0 7 654 321 0 e) one address byte from c and 2 reply bytes from cmx868 cs serial clock hi-z address first (msb) byte from cmx868 second(lsb) byte from cmx868 command data reply data 7 654 321 0 7 654 321 0 figure 16: c-bus transactions low power v.22bis modem 18 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.10.2 general control register: 16-bit write-only c-bus address $e0 this register controls general features of the cmx868 such as the powersave and loopback modes, the irq mask bits and the relay drive output. it also allows the fixed compromise equalizers in the tx and rx signal paths to be disabled if desired, and sets the internal clock dividers to use either a 11.0592 or a 12.288 mhz xtal frequency. all bits of this register are cleared to 0 by a general reset command. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 xtal freq lb equ rlydrv pwr rst en irq irq mask bits general control register b15-13: reserved, set to 000 general control register b12: xtal frequency this bit should be set according to the xtal frequency. b12 = 1 11.0592mhz b12 = 0 12.2880mhz general control register b11: analog loopback test mode this bit controls the analogue loopback test mode. note that in loopback test mode both transmit and receive mode registers should be set to the same modem type and band or bit rate. b11 = 1 local analog loopback mode enabled b11 = 0 no loopback (normal modem operation) general control register b10: tx and rx fixed compromise equalizers this bit allows the tx and rx fixed compromise equalizers in the modem transmit and receive filter blocks to be disabled. b10 = 1 disable equalizers b10 = 0 enable equalizers (600, 1200 or 2400bps modem modes) general control register b9: relay drive this bit directly controls the rdrv output pin. b9 = 1 rdrv output pin pulled to v ss b9 = 0 rdrv output pin pulled to v dd general control register b8: power-up this bit controls the internal power supply to most of the internal circuits, including the xtal oscillator and v bias supply. note that the general reset command clears this bit, putting the device into powersave mode. when the device is switched from powersave mode to normal operation by setting the powerup bit to 1, the reset bit should also be set to 1 and should be held at 1 for about 20ms while the internal circuits, xtal oscillator, and v bias to stabilize before starting to use the transmitter or receiver. changing the powerup bit from 0 to 1 clears all bits of the transmit mode and receive mode registers and clears b15 and b13-0 of the status register. b8 = 1 device powered up normally b8 = 0 powersave mode (all circuits except ring detect, rdrv and c-bus interface disabled) low power v.22bis modem 19 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. general control register b7: reset setting this bit to 1 resets the cmx868?s internal circuitry, clearing all bits of the transmit and receive mode registers and b15 and b13-0 of the status register. b7 = 1 internal circuitry in a reset condition. b7 = 0 normal operation general control register b6: en irq ( irq output enable) setting this bit to 1 enables the irq output pin. b6 = 1 irq pin driven low (to v ss ) if the irq bit of the status register = 1 b6 = 0 irq pin disabled (high impedance) general control register b5-0: irq mask bits these bits affect the operation of the irq bit of the status register as described in section 4.10.7. 4.10.3 transmit mode register: 16-bit write-only c-bus address $e1 this register controls the cmx868 transmit signal type and level. all bits of this register are cleared to 0 by a general reset command, in powersave mode, or when bit 7 (reset) of the general control register is 1. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 tx mode = modem tx level guard tone scrambler start-stop / synch data # data bits / synch data source tx mode = dtmf/tones tx level unused, set to 0000 dtmf or tone select bit: tx mode = disabled set to 0000 0000 0000 tx mode register bits 15-12: tx mode these 4 bits select the transmit operating mode. b15 b14 b13 b12 1 1 1 1 v.22bis 2400bps qam high band (answering modem) 1 1 1 0 ? low band (calling modem) 1 1 0 1 v.22/bell 212a 1200bps dpsk high band (answering modem) 1 1 0 0 ? low band (calling modem) 1 0 1 1 v.22 600bps dpsk high band (answering modem) 1 0 1 0 ? low band (calling modem) 1 0 0 1 v.21 300bps fsk high band (answering modem) 1 0 0 0 ? low band (calling modem) 0 1 1 1 bell 103 300bps fsk high band (answering modem) 0 1 1 0 ? low band (calling modem) 0 1 0 1 v.23 fsk 1200bps 0 1 0 0 ? 75bps 0 0 1 1 bell 202 fsk 1200bps 0 0 1 0 ? 150bps 0 0 0 1 dtmf / tones 0 0 0 0 transmitter disabled low power v.22bis modem 20 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. tx mode register bits 11-9: tx level these 3 bits set the gain of the tx level control block. bit 11 bit 10 bit 9 1 1 1 0db 1 1 0 -1.5db 1 0 1 -3.0db 1 0 0 -4.5db 0 1 1 -6.0db 0 1 0 -7.5db 0 0 1 -9.0db 0 0 0 -10.5db tx mode register b8-7: tx guard tone (qam, dpsk modes) these 2 bits select the guard tone to be transmitted together with highband qam or dpsk. set both bits to 0 in fsk modes. bit 8 bit 7 1 1 tx 550hz guard tone 1 0 tx 1800hz guard tone 0 x no tx guard tone tx mode register b6-5: tx scrambler (qam, dpsk modes) these 2 bits control the operation of the tx scrambler used in qam and dpsk modes. set both bits to 0 in fsk modes. bit 6 bit 5 1 1 scrambler enabled, 64 ones detect circuit enabled (normal use) 1 0 scrambler enabled, 64 ones detect circuit disabled 0 x scrambler disabled tx mode register b4-3: tx data format (qam, dpsk, fsk modes) these two bits select synchronous or start-stop mode and the addition of a parity bit to transmitted characters in start-stop mode. bit 4 bit 3 1 1 synchronous mode 1 0 start-stop mode, no parity 0 1 start-stop mode, even parity bit added to data bits 0 0 start-stop mode, odd parity bit added to data bits tx mode register b2-0: tx data and stop bits (qam, dpsk, fsk start-stop modes) in start-stop mode these three bits select the number of tx data and stop bits. b2 b1 b0 1 1 1 8 data bits, 2 stop bits 1 1 0 8 data bits, 1 stop bit 1 0 1 7 data bits, 2 stop bits 1 0 0 7 data bits, 1 stop bit 0 1 1 6 data bits, 2 stop bits 0 1 0 6 data bits, 1 stop bit 0 0 1 5 data bits, 2 stop bits 0 0 0 5 data bits, 1 stop bit low power v.22bis modem 21 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. tx mode register b2-0: tx data source (qam, dpsk, fsk synchronous mode) in synchronous mode (b4-3 = 11) these three bits select the source of the data fed to the tx fsk or qam/dpsk scrambler and modulator. b2 b1 b0 1 x x data bytes from tx data buffer 0 1 1 continuous 1s 0 1 0 continuous 0s 0 0 x continuous v.22bis handshake s1 pattern dibits ?00,11? in dpsk and qam modes, continuous alternating 1s and 0s in all other modes. low power v.22bis modem 22 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. tx mode register b8-0: dtmf/tones mode if dtmf/tones transmit mode has been selected (tx mode register b15-12 = 0001) then b8-5 should be set to 0000 and b4-0 will select a dtmf signal or a fixed tone or one of four programmed tones or tone pairs for transmission. b4 = 0: tx fixed tone or programmed tone pair bit 3 bit 2 bit 1 bit 0 tone frequency (hz) 0 0 0 0 no tone 0 0 0 1 697 0 0 1 0 770 0 0 1 1 852 0 1 0 0 941 0 1 0 1 1209 0 1 1 0 1336 0 1 1 1 1477 1 0 0 0 1633 1 0 0 1 1300 (calling tone) 1 0 1 0 2100 (answer tone) 1 0 1 1 2225 (answer tone) 1 1 0 0 tone pair ta programmed tx tone or tone pair, see 1.5.10.8 1 1 0 1 tone pair tb ? 1 1 1 0 tone pair tc ? 1 1 1 1 tone pair td ? b4 = 1: tx dtmf bit 3 bit 2 bit 1 bit 0 low frequency (hz) high frequency (hz) keypad symbol 0 0 0 0 941 1633 d 0 0 0 1 697 1209 1 0 0 1 0 697 1336 2 0 0 1 1 697 1477 3 0 1 0 0 770 1209 4 0 1 0 1 770 1336 5 0 1 1 0 770 1477 6 0 1 1 1 852 1209 7 1 0 0 0 852 1336 8 1 0 0 1 852 1477 9 1 0 1 0 941 1336 0 1 0 1 1 941 1209 * 1 1 0 0 941 1477 # 1 1 0 1 697 1633 a 1 1 1 0 770 1633 b 1 1 1 1 852 1633 c low power v.22bis modem 23 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.10.4 receive mode register receive mode register: 16-bit write-only. c-bus address $e2 this register controls the cmx868 receive signal type and level. all bits of this register are cleared to 0 by a general reset command, in powersave mode or when b7 (reset) of the general control register is 1. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 rx mode = modem rx level eq descramble start-stop/synch no. of bits and parity rx mode = tones detect rx level dtmf/tones/call progress select rx mode = disabled set to 0000 0000 0000 rx mode register bits 15-12: rx mode these 4 bits select the receive operating mode. bit 15 bit 14 bit 13 bit 12 1 1 1 1 v.22bis 2400bps qam high band (calling modem) 1 1 1 0 ? low band (answering modem) 1 1 0 1 v.22/bell 212a 1200bps dpsk high band (calling modem) 1 1 0 0 ? low band (answering modem) 1 0 1 1 v.22 600bps dpsk high band (calling modem) 1 0 1 0 ? low band (answering modem) 1 0 0 1 v.21 300bps fsk high band (calling modem) 1 0 0 0 ? low band (answering modem) 0 1 1 1 bell 103 300bps fsk high band (calling modem) 0 1 1 0 ? low band (answering modem) 0 1 0 1 v.23 fsk 1200bps 0 1 0 0 ? 75bps 0 0 1 1 bell 202 fsk 1200bps 0 0 1 0 ? 150bps 0 0 0 1 dtmf, programmed tone pair, answer tone, call progress detect 0 0 0 0 receiver disabled rx mode register b11-9: rx level these three bits set the gain of the rx gain control block. bit 11 bit 10 bit 9 1 1 1 0db 1 1 0 -1.5db 1 0 1 -3.0db 1 0 0 -4.5db 0 1 1 -6.0db 0 1 0 -7.5db 0 0 1 -9.0db 0 0 0 -10.5db low power v.22bis modem 24 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. rx mode register b8: rx auto-equalize (dpsk/qam modem modes) this bit controls the operation of the receive dpsk/qam auto-equalizer. set to 0 in fsk modes. bit 8 = 1 enable auto-equalizer bit 8 = 0 dpsk mode: auto-equalizer disabled qam mode : auto-equalizer settings frozen rx mode register b7-6: rx scrambler (dpsk/qam modem modes) these 2 bits control the operation of the rx de-scrambler used in qam and dpsk modes. set both bits to 0 in fsk modes bit 7 bit 6 1 1 de-scrambler enabled, 64 ones detect circuit enabled (normal use) 1 0 de-scrambler enabled, 64 ones detect circuit disabled 0 x de-scrambler disabled rx mode register b5-3: rx usart setting (qam, dpsk, fsk modem modes) these three bits select the rx usart operating mode. the 1% and 2.3% over-speed options apply to dpsk/qam modes only. b5 b4 b3 1 1 1 rx synchronous mode 1 1 0 rx start-stop mode, no over-speed 1 0 1 rx start-stop mode, +1% over-speed (1 in 8 missing stop bits allowed) 1 0 0 rx start-stop mode, +2.3% over-speed (1 in 4 missing stop bits allowed) 0 x x rx usart function disabled rx mode register b2-0: rx data bits and parity (qam, dpsk, fsk start-stop modem modes) in start-stop mode these three bits select the number of data bits (plus any parity bit) in each received character. these bits are ignored in synchronous mode. bit 2 bit 1 bit 0 1 1 1 8 data bits + parity 1 1 0 8 data bits 1 0 1 7 data bits + parity 1 0 0 7 data bits 0 1 1 6 data bits + parity 0 1 0 6 data bits 0 0 1 5 data bits + parity 0 0 0 5 data bits rx mode register b2-0: tones detect mode in tones detect mode (rx mode register b15-12 = 0001) b8-3 should be set to 000000 bits 2-0 select the detector type. bit 2 bit 1 bit 0 1 0 0 programmable tone pair detect 0 1 1 call progress detect 0 1 0 2100, 2225hz answer tone detect 0 0 1 dtmf detect 0 0 0 disabled low power v.22bis modem 25 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.10.5 tx data register tx data register: 8-bit write-only. c-bus addresses $e3 and $e4 bit: 7 6 5 4 3 2 1 0 data bits to be transmitted in synchronous tx data mode this register contains the next 8 data bits to be transmitted. bit 0 is transmitted first. in tx start-stop mode the specified number of data bits will be transmitted from this register (b0 first). a start bit, a parity bit (if required) and stop bit(s) will be added automatically. this register should only be written to when the tx data ready bit of the status register is 1. c-bus address $e3 should normally be used, $e4 is for implementing the v.14 over-speed transmission requirement in start-stop mode, see section 4.1. 4.10.6 rx data register rx data register: 8-bit read-only. c-bus address $e5 bit: 7 6 5 4 3 2 1 0 received data bits in unformatted rx data mode this register contains 8 received data bits, b0 of the register holding the earliest received bit, b7 the latest. in rx start-stop data mode this register contains the specified number of data bits from a received character, b0 holding the first received bit. low power v.22bis modem 26 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.10.7 status register: 16-bit read-only c-bus address $e6 bits 15 and 13-0 of this register are cleared to 0 by a general reset command, in powersave mode, or when b7 (reset) of the general control register is 1. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 irq rd pf see below for uses of these bits the meanings of the status register bits 12-0 depend on whether the receive circuitry is in modem or tones detect mode. status register bits: rx modem modes rx tones detect modes ** irq mask bit bit 15 irq bit 14 set to 1 on ring detect bit 5 bit 13 programming flag bit. see section 4.10.8 bit 4 bit 12 set to 1 on tx data ready. cleared by write to tx data register bit 3 bit 11 set to 1 on tx data underflow. cleared by write to tx data register bit 3 bit 10 1 when energy is detected in rx modem signal band 1 when energy is detected in call progress band or when both programmable tones are detected bit 2 b9 1 when s1 pattern (double dpsk dibit 00,11) is detected in dpsk or qam modes, or when ?1010..? pattern is detected in fsk modes 0 b1 b8 see following table 0 b1 b7 see following table 1 when 2100hz answer tone or the second programmable tone is detected b1 b6 set to 1 on rx data ready. cleared by read from rx data register 1 when 2225hz answer tone or the first programmable tone is detected b0 b5 set to 1 on rx data overflow. cleared by read from rx data register 1 when dtmfcode is detected b0 b4 set to 1 on rx framing error 0 - b3 set to 1 on even rx parity rx dtmf code b3, see table - b2 qam/dpsk rx signal quality b2 rx dtmf code b2 - b1 qam/dpsk rx signal quality b1 rx dtmf code b1 - b0 qam/dpsk rx signal quality b0 or fsk frequency demodulator output rx dtmf code b0 - note: ** this column shows the corresponding irq mask bits in the general control register. a 0 to 1 transition on any of the status register bits 14-5 will cause the irq bit b15 to be set to 1 if the corresponding irq mask bit is 1. the irq bit is cleared by a read of the status register or a general reset command or by setting b7 or b8 of the general control register to 1. a spurious ?continuous 0s? detect may be generated within 4ms of changing the rx mode register to any of the qam or dpsk modes. the operation of the data demodulator and pattern detector circuits within the cmx868 does not depend on the state of the rx energy detect function. low power v.22bis modem 27 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. decoding of status register b8,7 in rx modem modes, see also figure 14. b8 b7 de-scrambler disabled de-scrambler enabled (dpsk/qam modes only) 1 1 - scrambled 1s 1 0 unscrambled 0s scrambled 0s 0 1 unscrambled 1s unscrambled 1s 0 0 - - when the descrambler is enabled then detection of continuous unscrambled 1s will inhibit the continuous scrambled 1s detector. rx signal status register bit 5,6,7,8,9 or 10 status register bit 15 (irq) irq output notes: detect time note 1 note 3 note 2 1. irq will go high only if appropriate irq mask bit in general control register is set. the irq bit is cleared by a read of the status register. 2. output will go low when irq bit high if en bit of general control register is set irq irq 3. in rx modem modes status register bits 5 and 6 are set by a rx data ready or rx data underflow event and cleared by a read of the rx data register hold time figure 17: operation of status register bits 5-10 the irq output pin will be pulled low (to v ss ) when the irq bit of the status register and the en irq bit (b6) of the general control register are both 1. changes to status register bits caused by a change of tx or rx operating mode can take up to 150 s to take effect. in powersave mode or when the reset bit (b7) of the general control register is 1 the ring detect bit (b14) continues to operate but all other bits will be 0. the ?continuous 0? and ?continuous 1? detectors monitor the rx signal after the qam/dpsk descrambler, (see figure 14) and hence will detect continuous 1s or 0s if the descrambler is disabled, or continuous scrambled 1s or 0s if the descrambler is enabled. in qam or dpsk rx modem modes b2-0 of the status register contain a value indicative of the received signal ber, see figure 19. in rx fsk modem modes bits 2 and 1 will be zero and b0 will show the output of the frequency demodulator, updated at 8 times the nominal data rate. low power v.22bis modem 28 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. rx dtmf bursts ab status register bit 5 status register bits 3-0 status register bit 15 (irq) code for burst a code for burst b irq output notes: note 1 note 2 1. irq will go high only if the irq mask bit b0 in the general control register is set. the irq bit is cleared by a read of the status register. 2. output will go low when irq bit high if en bit of general control register is set irq irq figure 18: operation of status register in dtmf rx mode b3 b2 b1 b0 low frequency (hz) high frequency (hz) keypad symbol 0 0 0 0 941 1633 d 0 0 0 1 697 1209 1 0 0 1 0 697 1336 2 0 0 1 1 697 1477 3 0 1 0 0 770 1209 4 0 1 0 1 770 1336 5 0 1 1 0 770 1477 6 0 1 1 1 852 1209 7 1 0 0 0 852 1336 8 1 0 0 1 852 1477 9 1 0 1 0 941 1336 0 1 0 1 1 941 1209 * 1 1 0 0 941 1477 # 1 1 0 1 697 1633 a 1 1 1 0 770 1633 b 1 1 1 1 852 1633 c table 6: received dtmf code: b3-0 of status register low power v.22bis modem 29 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 1.e - 06 1.e - 05 1.e - 04 1.e - 03 0 1 2 3 4 5 6 7 rx status re g ister ber readin g ber figure 19: typical rx ber vs. average status register ber reading (b2-0) 4.10.8 programming register programming register : 16-bit write-only. c-bus address $e8 this register is used to program the transmit and receive programmed tone pairs by writing appropriate values to ram locations within the cmx868. note that these ram locations are cleared by powersave or reset. the programming register should only be written to when the programming flag bit (b13) of the status register is 1. the act of writing to the programming register clears the programming flag bit. when the programming action has been completed (normally within 150 s) the cmx868 will set the bit back to 1. when programming transmit or receive tone pairs, do not change the transmit or receive mode registers until programming is complete and the programming flag bit has returned to 1. transmit tone pair programming 4 transmit tone pairs (ta to td) can be programmed. the frequency (max 3.4khz) and level must be entered for each tone to be used. single tones are programmed by setting both level and frequency values to zero for one of the pair. programming is done by writing a sequence of up to seventeen 16-bit words to the programming register. the first word should be 32768 (8000 hex), the following 16-bit words set the frequencies and levels and are in the range 0 to 16383 (0-3fff hex) word tone pair value written 1 32768 2 ta tone 1 frequency 3 ta tone 1 level 4 ta tone 2 frequency 5 ta tone 2 level 6 tb tone 1 frequency 7 tb tone 1 level - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16 td tone 2 frequency 17 td tone 2 level low power v.22bis modem 30 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. the frequency values to be entered are calculated from the formula: 3.414 (hz) frequency desired entered be to value i.e. for 1khz the value to be entered is 3414 (or 0d56 in hex). the level values to be entered are calculated from the formula: dd rms v 93780 v desired entered be to value i.e. for 0.5v rms at v dd = 3.0v, the value to be entered is 15630 (3d0e in hex) note that allowance should be made for the transmit signal filtering in the cmx868 which attenuates the output signal for frequencies above 2khz by 0.25db at 2.5khz, by 1db at 3khz and by 2.2db at 3.4khz. on power-up or after a reset, the tone pairs ta-tc are set to notone, and td is set to generate 2130hz + 2750hz at approximately ?20dbm each. receive tone pair programming the programmable tone pair detector is implemented as shown in figure 20. the filters are 4 th order iir sections. the frequency detectors measure the time taken for a programmable number of complete input signal cycles and compare this time against programmable upper and lower limits. frequency measurement level detect enable rx signal filter frequency measurement level detect enable detector 1 status register b6 b10 b7 detector 2 filter figure 20: programmable tone detectors input output -a1 2 -a2 2 + + z -1 z -1 -a1 1 -a2 1 b2 2 b1 2 b0 2 + + z -1 z -1 + + b2 1 b1 1 b0 1 z -1 z -1 + + h(z) = fsample = 9600hz b0 .z + b1 .z -1 + b2 .z- 2 11 1 1 + a1 .z -1 + a2 .z- 2 11 b0 .z + b1 .z -1 + b2 .z- 2 22 2 1 + a1 .z -1 + a2 .z- 2 22 figure 21: filter implementation low power v.22bis modem 31 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. programming is done by writing a sequence of twenty-seven 16-bit words to the programming register. the first word should be 32769 (8001 hex), the following twenty-six 16-bit words set the frequencies and levels and are in the range 0 to 32767 (0000-7fff hex). word value written word value written 1 32769 2 filter #1 coefficient b2 1 15 filter #2 coefficient b2 1 3 filter #1 coefficient b1 1 16 filter #2 coefficient b1 1 4 filter #1 coefficient b0 1 17 filter #2 coefficient b0 1 5 filter #1 coefficient a2 1 18 filter #2 coefficient a2 1 6 filter #1 coefficient a1 1 19 filter #2 coefficient a1 1 7 filter #1 coefficient b2 2 20 filter #2 coefficient b2 2 8 filter #1 coefficient b1 2 21 filter #2 coefficient b1 2 9 filter #1 coefficient b0 2 22 filter #2 coefficient b0 2 10 filter #1 coefficient a2 2 23 filter #2 coefficient a2 2 11 filter #1 coefficient a1 2 24 filter #2 coefficient a1 2 12 freq measurement #1 ncycles 25 freq measurement #2 ncycles 13 freq measurement #1 mintime 26 freq measurement #2 mintime 14 freq measurement #1 maxtime 27 freq measurement #2 maxtime the coefficients are entered as 15-bit signed (two?s complement) integer values (the most significant bit of the 16-bit word entered should be zero) calculated as 8192 * coefficient value from the user?s filter design program (i.e. this allows for filter design values of -1.9999 to +1.9999). the design of the iir filters should make allowance for the fixed receive signal filtering in the cmx868 which has a low pass characteristic above 1.5khz of 0.4db at 2khz, 1.2db at 2.5khz, 2.6db at 3khz and 4.1db at 3.4khz. ?ncycles? is the number of signal cycles for the frequency measurement. ?mintime? is the smallest acceptable time for ncycles of the input signal expressed as the number of 9.6khz timer clocks. i.e. ?mintime? = 9600 * ncycles / high frequency limit ?maxtime? is the highest acceptable time for ncycles of the input signal expressed as the number of 9.6khz timer clocks. i.e. ?maxtime? = 9600 * ncycles / low frequency limit the level detectors include hysteresis. the threshold levels - measured at the 2 or 4-wire line with unity gain filters, using the line interface circuits described in section 3.2, 1.0 db line coupling transformer loss and with the rx gain control block set to 0db - are nominally: ?off? to ?on? -44.5dbm ?on? to ?off? -47.0dbm note: if any changes are made to the programmed values while the cmx868 is running in programmed tone detect mode they will not take effect until the cmx868 is next switched into programmed tone detect mode. on power-up or after a reset, the programmable tone pair detector is set to act as a simple 2130hz + 2750hz detector. low power v.22bis modem 32 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5 application notes 5.1 v.22bis calling modem application this section describes how the cmx868 can be used in a v.22bis calling modem application, employing v.25 automatic answering and the v.22bis recommended handshake sequence. this attempts to establish a 2400bps connection but may fall back to 1200bps if the answering modem is not capable of 2400bps operation. 1. ensure that the cmx868 is powered up. set the tx mode register to dtmf/tones mode (set to ?no tone? at this time), and the rx mode register to call progress detect mode. 2. connect the line (go off hook) then dial the required number using the dtmf generator, monitoring for call progress signals (dial tone, busy, etc). change to answer tone detect mode. 3. on detection of the 2100hz answer tone wait for it to end then wait for the 2225hz answer tone detector to respond. (the ?2225hz? answer tone detector will recognize unscrambled binary 1s at 1200bps high band as well as 2225hz). when unscrambled binary 1s or 2225hz have been received for 155ms set a 456ms timer. 4. when the 456ms timer expires check that the 2225hz or unscrambled 1s is still being received, then set the tx mode register for v.22 1200bps low band transmission of s1 signal and set a 100ms timer. also set the rx mode register to v.22 1200bps high band receive, descrambler, and rx usart disabled. 5. when the 100ms timer expires set the tx mode register for v.22 1200bps low band transmission of scrambled 1s (continuous 1s with the scrambler enabled) and look for received s1 signal. 6. if the s1 signal is not detected within 270ms then go to step 14 as the answering modem is not capable of 2400bps operation. 7. if s1 signal is detected wait for it to end then set a 450ms timer. 8. when the 450ms timer expires set the rx mode register to v.22bis 2400bps high band (this will begin 16-way decisions) with the auto-equalizer and de-scrambler enabled. start to monitor for rx scrambled 1?s. set a 150ms timer. 9. once 32 consecutive bits of received scrambled 1?s at 2400bps have been detected, enable the rx usart. 10. when the 150ms timer expires set the tx mode register for v.22bis 2400bps scrambled 1s, set a 200ms timer. 11. load the tx data register with the first data to be transmitted. 12. when the 200ms timer expires set the tx mode register for start-stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 11. 13. a 2400bps data connection has now been established. 14. if the s1 signal had not been detected within 270ms after step 5 then monitor for scrambled 1s at 1200bps. 15. when scrambled 1s (at 1200bps) have been received for 270ms enable the rx usart, set a 765ms timer and load the tx data register with the first data to be transmitted. 16. when the timer expires set the tx mode register for start-stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 15. 17. a 1200bps data connection has now been established. low power v.22bis modem 33 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5.2 v.22bis answering modem application this section describes how the cmx868 can be used in a v.22bis answering modem application, employing v.25 automatic answering and the v.22bis recommended handshake sequence. a 1200 or 2400bps connection will be established depending on the signals received from the calling modem. 1. it is assumed that the cmx868 will be in powersave mode, with the ring detector circuits monitoring the line. 2. when a ring signal is detected connect the line (go off hook), set a 2150ms timer and power up the cmx868, setting the tx mode register to dtmf/tones mode (set for ?no tone? at this time) and the rx mode register to v.22 1200bps low band receive, descrambler enabled, rx usart disabled. 3. when the 2150ms timer expires set the tx mode register to transmit the 2100hz answer tone and set a 3300ms timer. 4. when the 3300ms timer expires set the tx mode register to no tone and set a 75ms timer. 5. when the 75ms timer expires set the tx mode register for v.22 high band 1200bps transmission of unscrambled 1s. monitor the received signal for the s1 signal or scrambled 1s. 6. if scrambled 1s are detected for 270ms go to step 15. 7. if the s1 signal is received wait for it to end then set the tx mode register for v.22 high band 1200bps transmission of the s1 signal and set a 100ms timer. 8. when the 100ms timer expires set the tx mode register for v.22 high band 1200bps transmission of scrambled 1s and set a 350ms timer. 9. when the 350ms timer expires set the rx mode register for v.22bis low band 2400bps receive (this will begin 16-way decisions) with the auto-equalizer and de-scrambler enabled and the rx usart disabled, set a 150ms timer and start to monitor for rx scrambled 1s. 10. when the 150ms timer expires set the tx mode register for v.22bis high band 2400bps transmission of scrambled 1s and set a 200ms timer. 11. load the tx data buffer with the first data to be transmitted. 12. once 32 consecutive bits of received scrambled 1s at 2400bps have been detected, enable the rx usart. 13. when the 200ms timer expires set the tx mode register for start-stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 11. 14. a 2400bps data connection has now been established. 15. if scrambled 1s had been detected for 270ms in step 6, set the tx mode register to v.22 high band 1200bps scrambled 1s transmission and set a 765ms timer and enable the rx usart. 16. load the tx data buffer with the first data to be transmitted. 17. when the 765ms timer expires set the tx mode register for start-stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 16. 18. a 1200bps data connection has now been established. low power v.22bis modem 34 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6 performance specification 6.1 electrical performance 6.1.1 absolute maximum ratings exceeding these maximum ratings can result in damage to the device. min. max. units supply (v dd - v ss ) -0.3 7.0 v voltage on any pin to v ss -0.3 v dd + 0.3 v current into or out of v dd and v ss pins -50 +50 ma current into rdrv pin ( rdrv pin low) +50 ma current into or out of any other pin -20 +20 ma d2 / p4 package total allowable power dissipation at t amb = 25c 1000 mw derating above 25c 13 mw/c above 25c storage temperature -55 +125 c operating temperature -40 +85 c e2 package total allowable power dissipation at t amb = 25c 400 mw derating above 25c 5.3 mw/c above 25c storage temperature -55 +125 c operating temperature -40 +85 c 6.1.2 operating limits correct operation of the device outside these limits is not implied. notes min. max. units supply (v dd - v ss ) 2.7 5.5 v operating temperature -40 +85 c low power v.22bis modem 35 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.1.3 operating characteristics details in this section represent design target values and are not currently guaranteed. for the following conditions unless otherwise specified: v dd = 2.7v to 5.5v at t amb = -40 to +85c, xtal frequency = 11.0592 or 12.288mhz 0.01% (100ppm) 0dbm corresponds to 775mv rms . notes min. typ. max. units dc parameters i dd (powersave mode) 1, 2 - - tbd a (reset but not powersave, v dd = 3.0v) 1, 3 - 2.0 tbd ma (reset but not powersave, v dd = 5.0v) 1, 3 - 3.5 tbd ma (running, v dd = 3.0v) 1 - 3.5 tbd ma (running, v dd = 5.0v) 1 - 6.5 tbd ma logic '1' input level 4 70% - - v dd logic '0' input level 4 - - 30% v dd logic input leakage current (v in = 0 to v dd ), (excluding xtal/clock input) -1.0 - +1.0 a output logic '1' level (l oh = 2 ma) 80% - - v dd output logic '0' level (l ol = -3 ma) - - 0.4 v irq output 'off' state current (v out = v dd ) - - 1.0 a rd and rt pin schmitt trigger input high- goingthreshold (vt hi ) (see figure 22) 0.56v dd - 0.56v dd + 0.6v v rd and rt pin schmitt trigger input low- going threshold (vt lo ) (see figure 22) 0.44v dd - 0.6v - 0.44v dd v rdrv ?on? resistance to v ss (v dd = 3.0v) - - tbd rdrv ?off? resistance to v dd (v dd = 3.0v) - - tbd xtal/clock input (timings for an external clock input) 'high' pulse width 30 - - ns 'low' pulse width 30 - - ns transmit qam and dpsk modes (v.22, bell 212a, v.22bis) carrier frequency, high band 5 - 2400 - hz carrier frequency, low band 5 - 1200 - hz baud rate 6 - 600 - baud bit rate (v.22, bell 212a) 6 - 1200/600 - bps bit rate (v.22bis) 6 - 2400 - bps 550hz guard tone frequency 548 550 552 hz 550hz guard tone level with respect to data signal -4.0 -3.0 -2.0 db 1800hz guard tone frequency 1797 1800 1803 hz 1800hz guard tone level with respect to data signal -7.0 -6.0 -5.0 db low power v.22bis modem 36 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. notes min. typ. max. units transmit v.21 fsk mode baud rate 6 - 300 - baud mark (logical 1) frequency, high band 1647 1650 1653 hz space (logical 0) frequency, high band 1847 1850 1853 hz mark (logical 1) frequency, low band 978 980 982 hz space (logical 0) frequency, low band 1178 1180 1182 hz transmit bell 103 fsk mode baud rate 6 - 300 - baud mark (logical 1) frequency, high band 2222 2225 2228 hz space (logical 0) frequency, high band 2022 2025 2028 hz mark (logical 1) frequency, low band 1268 1270 1272 hz space (logical 0) frequency, low band 1068 1070 1072 hz transmit v.23 fsk mode baud rate 6 - 1200/75 - baud mark (logical 1) frequency, 1200 baud 1298 1300 1302 hz space (logical 0) frequency, 1200 baud 2097 2100 2103 hz mark (logical 1) frequency, 75 baud 389 390 391 hz space (logical 0) frequency, 75 baud 449 450 451 hz transmit bell 202 fsk mode baud rate 6 - 1200/150 - baud mark (logical 1) frequency, 1200 baud 1198 1200 1202 hz space (logical 0) frequency, 1200 baud 2197 2200 2203 hz mark (logical 1) frequency, 150 baud 386 387 388 hz space (logical 0) frequency, 150 baud 486 487 488 hz dtmf/single tone transmit tone frequency accuracy -0.2 - +0.2 % distortion 7 - 1.0 2.0 % transmit output level modem and single tone modes 7 -4.0 -3.0 -2.0 dbm dtmf mode, low group tones 7 -2.0 -1.0 0.0 dbm dtmf: level of high group tones with respect to low group 7 +1.0 +2.0 +3.0 db tx output buffer gain control accuracy 7 -0.25 - +0.25 db receive qam and dpsk modes (v.22, bell 212a, v.22bis) carrier frequency (high band) 2392 2400 2408 hz carrier frequency (low band) 1192 1200 1208 hz baud rate 9 - 600 - baud bit rate (v.22, bell 212a) 9 - 1200/600 - bps bit rate (v.22bis) 9 - 2400 - bps receive v.21 fsk mode acceptable baud rate 297 300 303 baud mark (logical 1) frequency, high band 1638 1650 1662 hz space (logical 0) frequency, high band 1838 1850 1862 hz mark (logical 1) frequency, low band 968 980 992 hz space (logical 0) frequency, low band 1168 1180 1192 hz low power v.22bis modem 37 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. notes min. typ. max. units receive bell 103 fsk mode acceptable baud rate 297 300 303 baud mark (logical 1) frequency, high band 2213 2225 2237 hz space (logical 0) frequency, high band 2013 2025 2037 hz mark (logical 1) frequency, low band 1258 1270 1282 hz space (logical 0) frequency, low band 1058 1070 1082 hz receive v.23 fsk mode 1200 baud acceptable baud rate 1188 1200 1212 baud mark (logical 1) frequency 1280 1300 1320 hz space (logical 0) frequency 2080 2100 2120 hz 75 baud acceptable baud rate 74 75 76 baud mark (logical 1) frequency 382 390 398 hz space (logical 0) frequency 442 450 458 hz receive bell 202 fsk mode 1200 baud acceptable baud rate 1188 1200 1212 baud mark (logical 1) frequency 1180 1200 1220 hz space (logical 0) frequency 2180 2200 2220 hz 150 baud acceptable baud rate 148 150 152 baud mark (logical 1) frequency 377 387 397 hz space (logical 0) frequency 477 487 497 hz rx modem signal (fsk, dpsk and qam modes) signal level 10 -45 - -9 dbm signal to noise ratio (noise flat 300- 3400hz) 20 - - db rx modem s1 pattern detector (dpsk and qam modes) will detect s1 pattern lasting for 90.0 - ms will not detect s1 pattern lasting for 72.0 ms hold time (minimum detector ?on? time) 5.0 - ms rx modem energy detector detect threshold (?off? to ?on) 10,11 - - -43.0 dbm undetect threshold (?on? to ?off?) 10,11 -48.0 - - dbm hysteresis 10,11 2.0 - - db detect (?off? to ?on?) response time qam and dpsk modes 10,11 10.0 - 35.0 ms 300 and 1200 baud fsk modes 10,11 8.0 - 30.0 ms 150 and 75 baud fsk modes 10,11 16.0 - 60.0 ms undetect (?on? to ?off?) response time qam and dpsk modes 10,11 10.0 - 55.0 ms 300 and 1200 baud fsk modes 10,11 10.0 - 40.0 ms 150 and 75 baud fsk modes 10,11 20.0 - 80.0 ms low power v.22bis modem 38 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. notes min. typ. max. units rx answer tone detectors detect threshold (?off? to ?on) 10,12 - - -43.0 dbm undetect threshold (?on? to ?off?) 10,12 -48.0 - - dbm hysteresis 10,12 2.0 - - db detect (?off? to ?on?) response time 10,12 30.0 33.0 45.0 ms undetect (?on? to ?off?) response time 10,12 7.0 18.0 25.0 ms 2100hz detector ?will detect? frequency 2050 - 2160 hz ?will not detect? frequency - - 2000 hz 2225hz detector ?will detect? frequency 2160 - 2285 hz ?will not detect? frequency 2335 - - hz rx call progress energy detector bandwidth (-3db points) see figure 9 275 - 665 hz detect threshold (?off? to ?on) 10,13 - - -37.0 dbm undetect threshold (?on? to ?off?) 10,13 -42.0 - - dbm hysteresis 10,13 2.0 - - db detect (?off? to ?on?) response time 10,13 30.0 36.0 45.0 ms undetect (?on? to ?off?) response time 10,13 6.0 8.0 50.0 ms dtmf decoder valid input signal levels (each tone of composite signal) 10 -30.0 - 0.0 dbm not decode level (either tone of composite signal) 10 - - -36.0 dbm twist = high tone/low tone -10.0 - 6.0 db frequency detect bandwidth 1.8 - % frequency not detect bandwidth 3.5 % max level of low frequency noise (i.e. dial tone) interfering signal frequency <= 550hz 14 - - 0.0 db interfering signal frequency <= 450hz 14 - - 10.0 db interfering signal frequency <= 200hz 14 - - 20.0 db max. noise level with respect to signal 14,15 - - -10.0 db dtmf detect response time - - 40.0 ms dtmf de-response time - - 30.0 ms status register b5 high time 14.0 - - ms ?will detect? dtmf signal duration 40.0 - - ms ?will not detect? dtmf signal duration - 25.0 - ms pause length detected 30.0 - - ms pause length ignored - - 15.0 ms receive input amplifier input impedance (at 100hz) 10.0 m open loop gain (at 100hz) 10000 v/v rx gain control block accuracy -0.25 +0.25 db low power v.22bis modem 39 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. operating characteristics notes: 1. at 25 c, not including any current drawn from the cmx868 pins by external circuitry other than x1, c1 and c2. 2. all logic inputs at v ss except for rt and cs inputs which are at v dd . 3. general mode register b8 and b7 both set to 1. 4. excluding rd and rt pins. 5. % carrier frequency accuracy is the same as xtal/clock % frequency accuracy. 6. tx signal % baud or bit rate accuracy is the same as xtal/clock % frequency accuracy. 7. measured between txa and tx a pins with tx level control gain set to 0db, 1k2 load between txa and tx a , at v dd = 3.0v (levels are proportional to v dd - see section 3.2). level measurements for all modem modes are performed with random transmitted data and without any guard tone. 0dbm = 775mv rms . 8. measured on the 2 or 4-wire line using the line interface circuits described in section 3.2 with the tx line signal level set to -10dbm for qam, qpsk, fsk or single tones, -6dbm and -8dbm for dtmf tones. excludes any distortion due to external components such as the line-coupling transformer. 9. these are the bit and baud rates of the line signal; the acceptable tolerance is 0.01%. 10. rx 2 or 4-wire line signal level assuming 1db loss in line coupling transformer with rx gain control block set to 0db and external components as section 3.2. 11. thresholds and times measured with random data for qam and dpsk modes, continuous binary ?1? for all fsk modes. fixed compromise line equalizer enabled. signal switched between off and -33dbm. 12. ?typical? value refers to 2100hz or 2225hz signal switched between off and -33dbm. times measured with respect to received line signal. 13. ?typical? values refers to 400hz signal switched between off and -33dbm. 14. referenced to dtmf tone of lower amplitude. 15. flat gaussian noise in 300-3400hz band. low power v.22bis modem 40 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 0 0.5 1 1.5 2 2.5 3 3.5 4 2.5 3 3.5 4 4.5 5 5.5 v dd v in vthi vtlo figure 22: typical schmitt trigger input voltage thresholds vs. v dd -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 100000 hz dbm bell 202 figure 23: maximum out of band tx line energy limits (see operating characteristics note 8) low power v.22bis modem 41 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.1.3.1 timing c-bus timings (see figure 24) notes min. typ. max. units t cse cs -enable to clock-high time 100 - - ns t csh last clock-high to cs -high time 100 - - ns t loz clock-low to reply output enable time 0.0 - - ns t hiz cs -high to reply output 3-state time - - 1.0 s t csoff cs -high time between transactions 1.0 - - s t nxt inter-byte time 200 - - ns t ck clock-cycle time 200 - - ns t ch serial clock-high time 100 - - ns t cl serial clock-low time 100 - - ns t cds command data set-up time 75.0 - - ns t cdh command data hold time 25.0 - - ns t rds reply data set-up time 50.0 - - ns t rdh reply data hold time 0.0 - - ns maximum 30pf load on each c-bus interface line. note: these timings are for the latest version of the c-bus as embodied in the cmx868, and allow faster transfers than the original c-bus timings as given in mx-com document # 20480060.001. cs hi-z = level not important or undefined serial clock t cse t ck t cl t cds t rds t cdh t rdh 70% v dd 30% v dd t ch t ck t csh t loz command data command data serial clock reply data reply data 76543 21 0 76543 21 0 76543 21 0 t nxt t csoff t hiz figure 24: c-bus timing low power v.22bis modem 42 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.2 packaging figure 25: 24-pin soic (d2) mechanical outline: order as part no. cmx868d2 figure 26: 24-pin tssop (e2) mechanical outline: order as part no. cmx868e2 low power v.22bis modem 43 cmx868 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480205.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. figure 27: 24-pin dip (p4) mechanical outline: order as part no. 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